Senior Technical Staff Engineer - Verification
Location- Bengaluru
job Description:
The dsPIC Business Unit is seeking a Senior Technical Staff Engineer –
Verification to join our team in Chandler, Arizona. In this role, you will
lead IP-level verification for dsPIC products using formal verification and
UVM testbenches. You will work closely with cross-functional teams across the
USA, India, and other global corporate teams to ensure high-quality
verification results and timely project execution.
Key Responsibilities
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Architect, develop, and maintain UVM verification environments and Formal
verification environments.
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Define verification plans and implement constrained-random UVM Testbench
and/or Formal Testbench.
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Develop assertions and coverage in System Verilog language, analyze coverage
metrics, and drive coverage closure.
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Debug RTL and testbench issues, perform root cause analysis, and collaborate
with design and architecture teams to resolve defects.
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Collaborate with SoC development teams to integrate IP-level testbenches and
tests into SoC-level verification environments.
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Collaborate with architects, designers, and applications teams to verify IP
and product requirements and deliver quality results on schedule.
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Provide technical support and mentoring to verification engineers and drive
projects to completion on schedule.
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Continuously improve verification methodologies by leveraging AI/ML
automation to reduce the cycle time of verification.
Requirements/Qualifications:
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Bachelor’s or master’s degree in Electrical Engineering, Electronics
Engineering, Computer Engineering, or a related field.
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Minimum 15 years of experience in functional verification.
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Strong expertise in SystemVerilog language, assertions, and UVM methodology.
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Proven experience building IP-level and SoC-level verification environments
using UVM and/or formal verification Testbenches.
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Excellent understanding of digital design, RTL fundamentals, and ARM/RISC
SoC architectures.
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Strong communication, teamwork, and problem-solving skills.
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Highly motivated, detail-oriented, and committed to delivering quality
results on time.
Preferred Qualifications
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Demonstrated success in mentoring engineers and leading verification efforts
across global teams.
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Experience driving methodology improvements and automation initiatives.