HI
Kinldy review the JD, if interested-
NOTE- KINDLY UPDATE YOUR CV WITH KEY SKILLS HIGHLIGHTED IN JD,
NOTICE PERIOD SHOULD BE LESS THEN 2 MTH.
send me details-
ctc- fixed+variable+rsu for years,
expect ctc-
notice period-
current location-
jd
Requirements/Qualifications:
Qualifications:
-
Master’s or Bachelor’s degree in Electrical Engineering, Computer
Engineering, or related field.
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18+ years of experience in silicon design and verification, with a proven
track record in
leading teams and delivering complex SoC/ASIC products.
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Deep technical expertise in
PCIe, CXL, SAS protocols, and high-speed connectivity architectures.
-
Hands-on experience with
RTL design (Verilog/VHDL), verification (SystemVerilog/UVM), synthesis,
and timing analysis.
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Strong understanding of
silicon development lifecycle, EDA tools, and tape-out processes.
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Excellent leadership, communication, and project management skills.
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Experience working in a global, matrixed organization is a plus.
Preferred Skills:
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Experience with retimer and switch architectures.
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Familiarity with security, power management, and reliability features in
connectivity silicon.
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Prior experience interfacing with customers and driving technical
discussions.
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Having worked in multinational companies and having experience in North
America
Why Join Us?
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Opportunity to lead cutting-edge silicon development in a fast-growing
technology domain.
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Deliver key products in the fast-growing DC and AI marketplace.
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Work with a world-class team of engineers and innovators.
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Dynamic, inclusive, and collaborative work environment.